Computer Applications For UPSC EPFO & NABARD: OSI Model, DBMS & Memory

UPSC EPFO EO/AO & APFC • NABARD Grade A • RBI Assistant • IBPS SO

⚡ Quick Answer & AI Exam Snapshot (TL;DR)

Computer Applications carries 5 to 10 questions in UPSC EPFO (EO/AO & APFC) and 20 marks in NABARD Grade A Phase-1. Every aspirant must memorize: (1) Memory Hierarchy by Speed (CPU Registers > L1/L2/L3 Cache [made of fast, expensive Static RAM / SRAM using flip-flops that need NO refreshing] > Main Memory RAM [Dynamic RAM / DRAM using capacitors that require continuous refreshing] > SSD > Magnetic Hard Disk > Magnetic Tape); (2) Number System Conversions (Binary, Octal, Decimal, Hexadecimal & 2’s Complement); (3) Operating System Concepts (Kernel, Thrashing, Virtual Memory Paging, and Coffman’s 4 Necessary Conditions for Deadlock); (4) DBMS Keys (Super Key, Candidate Key, Primary Key, Alternate Key, Foreign Key) & ACID Properties; and (5) The 7-Layer ISO-OSI Model (Physical, Data Link, Network, Transport, Session, Presentation, Application — with exact Hardware Devices, PDU Data Units, and Port Numbers at each layer!).

1. Computer Architecture, Memory Hierarchy (SRAM vs DRAM) & Number System Conversions

In UPSC EPFO and NABARD Grade A, questions on the CPU–Memory Hierarchy and Number System / Complement conversions appear in every paper:

Memory / Architecture Component	Technology & Volatility	Speed Order & High-Yield Exam Triggers
1. CPU Registers (Accumulator, PC, IR, MAR, MDR)	Volatile (Inside CPU ALU/CU)	FASTEST & Most Expensive per bit in the entire memory hierarchy! • Program Counter (PC): Holds the memory address of the NEXT instruction to be executed! • Instruction Register (IR): Holds the instruction currently being executed/decoded.
2. Cache Memory (L1, L2, L3)	Static RAM (SRAM) — Volatile	Built using Transistor Flip-Flops (6 transistors per cell); DOES NOT require periodic refreshing; sits between CPU and Main RAM to bridge the speed gap based on Locality of Reference.
3. Main Memory (Primary RAM)	Dynamic RAM (DRAM) — Volatile	Built using 1 Transistor + 1 Capacitor per bit; because capacitors leak charge, DRAM MUST be refreshed thousands of times per second! Slower, denser, and cheaper than SRAM.
4. Read-Only Memory (ROM, PROM, EPROM, EEPROM)	Non-Volatile Primary Memory	Stores BIOS / Firmware / Bootstrap Loader. • EPROM: Erased using Ultraviolet (UV) Light. • EEPROM & Flash Memory (SSD/Pen Drive): Erased Electrically at byte/block level!
5. Number Systems & Logic Gates	Base-2, Base-8, Base-10, Base-16	• 1 Nibble = 4 Bits \| 1 Byte = 8 Bits. • Octal (Base-8, digits 0–7): Each Octal digit = 3 Binary Bits ($2^3 = 8$). • Hexadecimal (Base-16, 0–9 & A–F where A=10, F=15): Each Hex digit = 4 Binary Bits (1 Nibble) ($2^4 = 16$). • 2’s Complement of a Binary Number: $\text{1’s Complement (invert } 0 \leftrightarrow 1\text{)} + 1$. • Universal Logic Gates: NAND and NOR are the ONLY two Universal Gates (any Boolean function can be built using only NAND or only NOR gates!).

2. The 7-Layer ISO–OSI Networking Model: Devices, PDU Data Units & TCP/IP Protocols

Memorize every row of this 7-Layer OSI Model Table (Mnemonic from Layer 1 to Layer 7: Please Do Not Throw Sausage Pizza Away):

Layer # & Name	Protocol Data Unit (PDU)	Hardware Device Operating at Layer	Core Protocols, Port Numbers & Functions
Layer 7: Application Layer	Data / Message	Gateway / Firewall / Proxy	User interface & network services: • HTTP (Port 80) & HTTPS (Port 443) • FTP (Port 20 Data / Port 21 Control), SSH (Port 22), Telnet (Port 23) • SMTP (Port 25 — Sending Email), POP3 (Port 110), IMAP (Port 143) • DNS (Port 53 — Domain Name to IP address), DHCP (Ports 67/68).
Layer 6: Presentation Layer	Data	Gateway	Syntax, Data Translation, Encryption/Decryption (SSL/TLS) & Data Compression (ASCII, EBCDIC, JPEG, MPEG).
Layer 5: Session Layer	Data	Gateway	Dialog Control (Half-Duplex/Full-Duplex), Token Management & Synchronization (Checkpoints) between applications.
Layer 4: Transport Layer (Heart of OSI — End-to-End Process Delivery)	Segment (TCP) / Datagram (UDP)	Gateway / Layer-4 Load Balancer	Uses 16-Bit Port Numbers, Flow Control & Error Recovery: • TCP (Transmission Control Protocol): Connection-oriented, reliable, 3-way handshake. • UDP (User Datagram Protocol): Connectionless, fast, low-overhead (used for live streaming, VoIP, DNS).
Layer 3: Network Layer (Logical Addressing & Routing)	Packet	ROUTER & Layer-3 Switch	Uses Logical IP Addresses: IPv4 (32-bit, 4 octets in dotted decimal, e.g., 192.168.1.1;Loopback = 127.0.0.1) & IPv6 (128-bit, 8 groups in Hexadecimal). Protocols: IP, ICMP (used by ‘ping’ & ‘traceroute’), ARP (IP to MAC), OSPF, BGP.
Layer 2: Data Link Layer (DLL) (Node-to-Node Hop Delivery — LLC + MAC sublayers)	Frame	SWITCH, Bridge & NIC (Network Interface Card)	Uses 48-Bit (6-Byte) Physical MAC Address (written as 12 Hexadecimal digits burned into NIC ROM), Framing, Flow Control & CRC Error Detection.
Layer 1: Physical Layer	Bit (0s and 1s)	HUB, Repeater, Modem & Cables (Twisted Pair, Coaxial, Fibre Optic)	Bit-stream transmission over physical media. Fibre Optic Cable uses the physics principle of Total Internal Reflection (TIR) of light!

3. Operating Systems (Deadlock & Paging), DBMS (Keys, Normalization & SQL) & Cybersecurity

1. Operating System (OS) High-Yield Concepts:
• Coffman’s 4 Necessary Conditions for Deadlock (All 4 must hold simultaneously!): (1) Mutual Exclusion; (2) Hold and Wait; (3) No Preemption; and (4) Circular Wait. (Banker’s Algorithm by Edsger Dijkstra is used for Deadlock Avoidance).
• Virtual Memory, Paging & Thrashing: Virtual memory allows execution of processes larger than physical RAM by swapping fixed-size blocks called Pages (logical memory) into Frames (physical RAM). When the CPU spends more time swapping pages in and out (high Page Fault rate) than executing actual instructions, this severe performance collapse is called ‘THRASHING’!

2. Relational DBMS Keys, Normalization & SQL Sub-Languages (E.F. Codd):
• Super Key: Any set of attributes that uniquely identifies a tuple (row) in a relation (table).
• Candidate Key: A minimal Super Key (no redundant attribute).
• Primary Key: The Candidate Key chosen by the database designer to uniquely identify rows — CANNOT be NULL and CANNOT have duplicate values (Entity Integrity Constraint!).
• Alternate (Secondary) Key: $\text{All Candidate Keys} – \text{Primary Key}$.
• Foreign Key: An attribute in one table that references the Primary Key of another table (enforces Referential Integrity Constraint; CAN contain NULL and duplicate values!).
• SQL Command Classification (Asked in UPSC EPFO!):
1. DDL (Data Definition Language — Schema structure, auto-committed): CREATE, ALTER, DROP, TRUNCATE, RENAME.
2. DML (Data Manipulation Language — Row-level data): SELECT*, INSERT, UPDATE, DELETE (*SELECT is also classified separately as DQL — Data Query Language).
3. DCL (Data Control Language — Permissions): GRANT, REVOKE.
4. TCL (Transaction Control Language — ACID transactions): COMMIT, ROLLBACK, SAVEPOINT.

🎯 High-Yield Exam One-Liners (Last-Minute Revision Box)

The correct descending order of memory speed (fastest to slowest) is: CPU Registers > L1/L2/L3 Cache (SRAM) > Main Memory RAM (DRAM) > Solid State Drive (SSD) > Magnetic Hard Disk > Magnetic Tape.
Static RAM (SRAM) uses transistor flip-flops, does not require refreshing, and is used to build CPU Cache Memory; Dynamic RAM (DRAM) uses capacitors, requires constant refreshing, and is used for Main RAM.
Inside the CPU, the Program Counter (PC) holds the memory address of the NEXT instruction to be executed, while the Instruction Register (IR) holds the currently executing instruction.
NAND and NOR are the two ‘Universal Logic Gates’ because any Boolean logic circuit (AND, OR, NOT, XOR) can be constructed using only NAND or only NOR gates.
In Number Systems, 1 Nibble = 4 Bits, 1 Byte = 8 Bits, 1 Octal digit = 3 Binary bits, and 1 Hexadecimal digit = 4 Binary bits.
An IPv4 address is 32 bits long (4 bytes/octets separated by dots, with 127.0.0.1 reserved as the Loopback address), whereas an IPv6 address is 128 bits long (16 bytes written in Hexadecimal).
A Physical MAC (Media Access Control) Address is 48 bits (6 Bytes / 12 Hexadecimal digits) long, burned into the NIC ROM, and operates at Layer 2 (Data Link Layer) of the OSI model.
In the 7-Layer OSI Model: Hubs and Repeaters operate at Layer 1 (Physical); Switches and Bridges operate at Layer 2 (Data Link); and Routers operate at Layer 3 (Network).
In the OSI Model, the Protocol Data Units (PDUs) are: Bits at Layer 1 (Physical), Frames at Layer 2 (Data Link), Packets at Layer 3 (Network), and Segments/Datagrams at Layer 4 (Transport).
Encryption/Decryption (SSL/TLS) and Data Compression occur at Layer 6 (Presentation Layer) of the OSI model.
ARP (Address Resolution Protocol) translates a known 32-bit Logical IP Address into a 48-bit Physical MAC Address, whereas DNS (Port 53) translates a human-readable Domain Name into an IP Address.
In Operating Systems, ‘Thrashing’ occurs when a process spends more time paging (swapping pages between RAM and disk due to excessive Page Faults) than executing instructions.
Coffman’s 4 necessary conditions for Deadlock in an OS are: Mutual Exclusion, Hold and Wait, No Preemption, and Circular Wait; Dijkstra’s Banker’s Algorithm is used for Deadlock Avoidance.
A Compiler translates an entire high-level language source program into machine code all at once, whereas an Interpreter translates and executes the program line-by-line (and Assembler translates Assembly language).
In a Relational DBMS, a Primary Key enforces Entity Integrity (cannot be NULL or duplicate), whereas a Foreign Key enforces Referential Integrity (links to another table’s Primary Key and can be NULL).
In SQL, CREATE, ALTER, DROP, and TRUNCATE are DDL (Data Definition Language) commands, whereas INSERT, UPDATE, and DELETE are DML (Data Manipulation Language) commands.
‘Phishing’ uses fraudulent emails/websites to steal credentials; ‘Ransomware’ encrypts victim files and demands payment; ‘Zero-Day Exploit’ attacks an unpatched software vulnerability unknown to the vendor; and ‘WPA3’ is the strongest modern Wi-Fi encryption standard.

📝 UPSC & Regulatory Level Practice MCQs (With Detailed Solutions)

Q1. In the 7-Layer ISO–OSI Reference Model of computer networking, at which layers do (i) a Switch/Bridge, (ii) a Router, and (iii) Encryption/Decryption and Data Compression operate, respectively?

A. (i) Layer 1 (Physical); (ii) Layer 2 (Data Link); (iii) Layer 7 (Application)
B. (i) Layer 2 (Data Link Layer); (ii) Layer 3 (Network Layer); (iii) Layer 6 (Presentation Layer)
C. (i) Layer 3 (Network); (ii) Layer 4 (Transport); (iii) Layer 5 (Session)
D. (i) Layer 2 (Data Link); (ii) Layer 4 (Transport); (iii) Layer 6 (Presentation)

Correct Answer: (B) — In the 7-Layer OSI Model: Switches and Bridges use 48-bit MAC addresses to forward Frames at Layer 2 (Data Link Layer); Routers use 32-bit/128-bit IP addresses to route Packets at Layer 3 (Network Layer); and Data Translation, Compression, and Encryption/Decryption take place at Layer 6 (Presentation Layer).

Q2. What is the hexadecimal and decimal equivalent of the 8-bit binary number (11010110)_2?

A. Hexadecimal = D6; Decimal = 214
B. Hexadecimal = C6; Decimal = 198
C. Hexadecimal = D5; Decimal = 213
D. Hexadecimal = E6; Decimal = 230

Correct Answer: (A) — Split the 8-bit binary number into two 4-bit nibbles: 1101 = 8 + 4 + 0 + 1 = 13 (which is ‘D’ in Hexadecimal) and 0110 = 0 + 4 + 2 + 0 = 6. Thus, Hexadecimal = D6. In Decimal: (13 x 16) + 6 = 208 + 6 = 214.

Q3. In a Relational Database Management System (RDBMS), which SQL command is a DDL (Data Definition Language) command that removes ALL rows from a table swiftly by deallocating data pages without logging individual row deletions, while keeping the table structure/schema intact for future use?

A. DELETE
B. DROP
C. TRUNCATE
D. ALTER

Correct Answer: (C) — DELETE is a DML command that deletes rows one by one (can use a WHERE clause and be rolled back). DROP is a DDL command that deletes both all rows AND the entire table structure permanently. TRUNCATE is a DDL command that empties all rows from a table instantaneously while preserving the table structure/schema.

Q4. Which of the following statements accurately distinguishes between Static RAM (SRAM) and Dynamic RAM (DRAM)?

A. SRAM uses capacitors and requires constant refreshing, whereas DRAM uses flip-flops and is used for CPU Cache.
B. SRAM uses transistor flip-flops, does NOT require periodic refreshing, is faster and more expensive, and is used for CPU Cache Memory (L1/L2/L3); whereas DRAM uses capacitors that leak charge, requires continuous periodic refreshing, and is used as Main Memory (RAM).
C. SRAM is non-volatile memory like ROM, whereas DRAM is volatile.
D. DRAM is faster than CPU Registers, whereas SRAM is slower than Hard Disks.

Correct Answer: (B) — Both SRAM and DRAM are volatile memories (lose data when power is turned off). However, SRAM stores bits in 6-transistor flip-flop latches that hold state without refreshing as long as power is supplied (making it ultra-fast and ideal for L1/L2/L3 Cache), whereas DRAM stores each bit in a tiny capacitor that leaks charge and must be refreshed every few milliseconds (making it denser and cheaper for Main System RAM).

Q5. What are the bit lengths of (i) an IPv4 Address, (ii) a Physical MAC Address, and (iii) an IPv6 Address, respectively?

A. (i) 32 bits; (ii) 48 bits; (iii) 128 bits
B. (i) 16 bits; (ii) 32 bits; (iii) 64 bits
C. (i) 32 bits; (ii) 64 bits; (iii) 128 bits
D. (i) 48 bits; (ii) 32 bits; (iii) 256 bits

Correct Answer: (A) — (i) An IPv4 logical address is 32 bits (4 Bytes) long; (ii) a Physical MAC hardware address is 48 bits (6 Bytes, 12 Hex digits) long; and (iii) an IPv6 logical address is 128 bits (16 Bytes) long.

❓ Frequently Asked Questions (Exam FAQs)

Q: What are the ACID properties of a database transaction in DBMS?

ACID stands for: (1) Atomicity (‘All or Nothing’ — either the entire transaction executes completely or none of it does); (2) Consistency (the database moves from one valid state to another preserving all integrity constraints); (3) Isolation (concurrent transactions execute without interfering with each other); and (4) Durability (once a transaction is committed, its changes persist permanently even in the event of a system crash or power failure).

Q: What is the difference between a Hub, a Switch, and a Router?

A Hub (Layer 1) is an unintelligent multi-port repeater that broadcasts every incoming signal to ALL connected ports (single collision domain). A Switch (Layer 2) is an intelligent device that reads the 48-bit MAC address in a Frame and forwards it ONLY to the specific destination port (each port is its own collision domain, single broadcast domain). A Router (Layer 3) reads the 32-bit/128-bit IP address in a Packet to connect different networks (LAN to WAN/Internet) and breaks up broadcast domains.

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